1. Field of the Invention
The present invention relates to a semiconductor device, more particularly to a nitride semiconductor device such as a blue laser and a fast-operation transistor, and to a method for fabricating the same. The present invention also relates to a semiconductor substrate and a fabrication method thereof to be used for the above-mentioned semiconductor device and a fabrication method thereof.
2. Description of the Related Art
FIG. 4 is a cross sectional view illustrating a conventional semiconductor device 1000. In FIG. 4, a buffer layer 50 is provided on a substrate 1 made of sapphire. On the buffer layer 50, successively provided are an n-type GaN layer 2, an n-type AlGaN cladding layer 3, an n-type GaN light guiding layer 4, an active layer 5 made of i-type InGaN, a p-type GaN light guiding layer 6, a first p-type AlGaN cladding layer 7, a current constriction layer 8 having an opening 8a, a second p-type AlGaN cladding layer 9, and a p-type GaN contact layer 10. Furthermore, an n-type electrode 11 is provided on the lower surface of the substrate 1 while a p-type electrode 12 is provided on the upper surface of the p-type GaN contact layer 10.
The buffer layer 50 is provided for relieving lattice mismatch between the substrate 1 and the n-type GaN layer 2, thereby facilitating crystal growth of the n-type GaN layer 2. The buffer layer 50 has substantially no direct influence on operation of the semiconductor device 1000.
Since the active layer 5 is formed of a nitride semiconductor material, the semiconductor device 1000 can serve as a laser emitting blue light (i.e., as a blue laser) when a voltage is applied between the n-type electrode 11 and the p-type electrode 12.
As shown in FIG. 4, however, linear lattice defects 1010 existing in the substrate 1 extend upward as the n-type GaN layer 2, the n-type AlGaN cladding layer 3, and the like, are grown. Such linear lattice defects 1010 finally reach a portion of the i-type GaN active layer 5 under the opening 8a of the current constriction layer 8, the portion serving as an active region of the semiconductor device 1000 as a semiconductor laser.
When the semiconductor device 1000 requires a high current injection for its operation, for example, as a semiconductor laser, such a high current injection is likely to deteriorate the semiconductor device 1000 from a portion thereof having the lattice defect 1010, and thus significantly reduce the life time and reliability thereof.
In addition, when the semiconductor device 1000 is supposed to serve as a fast-operation semiconductor transistor element, a gate region of the fast-operation semiconductor transistor element also is adversely affected by the lattice defect so that a carrier mobility is decreased, thereby deteriorating the performance of the semiconductor transistor element.
As described above, the existence of the lattice defect in the active layer of the semiconductor laser element, the gate region of the semiconductor transistor element, and the like which function as an active region in the semiconductor device 1000 leads to a deterioration in the performance thereof.
The semiconductor device of this invention includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
Preferably, the portion in the semiconductor layer structure at which the active region is provided contains fewer defects as compared to surrounding regions.
In one embodiment, the crystal plane is a tilted surface which is tilted with respect to the primary surface of the crystalline substrate, and the active region is positioned above lattice defects which extend in a direction substantially perpendicular to the crystal plane.
In one embodiment, a convex-and-concave structure is provided in the primary surface of the crystalline substrate, and the crystal plane is part of the convex-and-concave structure.
A convex portion included in the convex-and-concave structure may have a forward mesa structure.
A convex portion included in the convex-and-concave structure may have a cross section in the shape of a triangle pointing upward from the primary surface of the crystalline substrate.
The convex-and-concave structure may have a periodic structure.
According to another aspect of the invention, a semiconductor device includes: a crystalline substrate; a first semiconductor layer provided on the crystalline substrate; a second semiconductor layer provided on the first semiconductor layer; and an active region provided in the second semiconductor layer, wherein each of the crystalline substrate and the first semiconductor layer includes a primary surface and a crystal plane provided at least within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface.
In one embodiment, the crystal plane of the first semiconductor layer is a tilted surface which is tilted with respect to the primary surface of the first semiconductor layer, and the active region is positioned above lattice defects extending in a direction substantially perpendicular to the crystal plane of the first semiconductor layer.
In one embodiment, a convex-and-concave structure is provided over the crystalline substrate, and the crystal plane of the crystalline substrate or that of the first semiconductor layer is part of the convex-and-concave structure.
In one embodiment, the crystal plane of the first semiconductor layer is positioned above the crystal plane of the crystalline substrate.
A convex portion included in the convex-and-concave structure may have a forward mesa structure.
A convex portion included in the convex-and-concave structure may have a cross section in the shape of a triangle pointing upward from the crystalline substrate.
The convex-and-concave structure may have a periodic structure.
In the aforementioned semiconductor devices, the active region may be made of a III group nitride compound material, and serve as a light emitting region of a light emitting element.
The active region may be made of a III group nitride compound material, and serve as a gate of a field effect transistor.
The active region may be made of a III group nitride compound material, and serve as a base of a bipolar transistor.
The active region may be made of a III group nitride compound material, and serve as a junction region of a diode.
A method for fabricating a semiconductor device according to the present invention includes the steps of: forming a crystal plane on a primary surface of a substrate so that a surface orientation of the crystal plane is different from a surface orientation of the primary surface of the substrate; and forming a semiconductor layered structure made of a III group nitride compound material over the crystal plane and the primary surface of the substrate.
In one embodiment, the crystal plane forming step includes the steps of: forming a mask having a predetermined pattern on the substrate; and selectively etching a portion of the substrate not covered with the mask.
In one embodiment, the substrate is made of AlxGa1-xN(0xe2x89xa6xxe2x89xa61), and the semiconductor layered structure forming step includes the step of forming an AlyGa1-yN layer (0xe2x89xa6yxe2x89xa61) at a crystal growth temperature of about 900xc2x0 C. or more.
In one embodiment, the substrate is made of sapphire, silicon carbide, silicon, or gallium arsenide, and the semiconductor layered structure forming step includes the steps of: forming over the substrate, a first AlaGa1-aN layer (0xe2x89xa6axe2x89xa61) at a crystal growth temperature in a range of about 400xc2x0 C. to about 900xc2x0 C.; and forming over the first AlaGa1-aN layer, a second AlbGa1-bN layer (0xe2x89xa6bxe2x89xa61) at a crystal growth temperature of about 900xc2x0 C. or more.
In one embodiment, the semiconductor layered structure forming step includes the step of introducing an impurity to a predetermined portion of the semiconductor layered structure at a concentration of about 1021 cmxe2x88x923 or less.
In one embodiment, in the semiconductor layered structure forming step, a mole supply ratio of a V group source material to a III group source material (a V/III ratio) is about 200 or more.
According to another aspect of the present invention, a method for fabricating a semiconductor device includes the steps of: forming a first crystal plane on a primary surface of a substrate so that a surface orientation of the first crystal plane is different from a surface orientation of the primary surface of the substrate; forming a first semiconductor layer over the crystal plane and the primary surface of the substrate; forming a second crystal plane on a primary surface of the first semiconductor layer so that a surface orientation of the second crystal plane is different from a surface orientation of a primary surface of the first semiconductor layer; and forming a second semiconductor layer made of a III group nitride compound material over the second crystal plane and the primary surface of the first semiconductor layer.
In one embodiment, the second semiconductor layer forming step includes the steps of forming a mask having a predetermined pattern on the first semiconductor layer, and selectively etching a portion of the first semiconductor layer not covered with the mask.
In one embodiment, the substrate is made of AlxGa1-xN(0xe2x89xa6xxe2x89xa61), and the second semiconductor layer forming step includes the step of forming an AlyGa1-y N layer (0xe2x89xa6yxe2x89xa61) at a crystal growth temperature of about 900xc2x0 C. or more.
In one embodiment, the substrate is made of sapphire, silicon carbide, silicon, or gallium arsenide, and the second semiconductor layer forming step includes the steps of: forming over the substrate, a AlaGa1-aN buffer layer (0xe2x89xa6axe2x89xa61) at a crystal growth temperature in a range of about 400xc2x0 C. to about 900xc2x0 C.; and forming over the AlaGa1-aN buffer layer, a second AlbGa1-bN layer (0xe2x89xa6bxe2x89xa61) at a crystal growth temperature of about 900xc2x0 C. or more.
In one embodiment, the second semiconductor layer forming step includes the step of introducing an impurity to the second semiconductor layer at a concentration of about 1021 cmxe2x88x923 or less.
In one embodiment, in the second semiconductor layer forming step, a mole supply ratio of a V group source material to a III group source material (a V/III ratio) is about 200 or more.
According to still another aspect of the present invention, a method for fabricating a semiconductor substrate is provided to include the steps of: forming a crystal plane on a primary surface of a substrate so that a surface orientation of the crystal plane is different from a surface orientation of the primary surface of the substrate; forming a semiconductor layer made of a III group nitride compound material over the crystal plane and the primary surface of the substrate; and separating the semiconductor layer from the substrate.
In the aforementioned semiconductor device according to the present invention, the crystal plane provided within the primary surface of the substrate may extend along a  less than 1,1,xe2x88x922,0 greater than  direction.
According to the present invention, a semiconductor layer in a semiconductor layered structure is grown in a certain direction in accordance with the shape of an upper surface of an underlying semiconductor layer including a primary surface and a tilted surface. In addition, a growth direction of a linear lattice defect in the overlying semiconductor layer also deviates from a normal direction of the primary surface of the underlying semiconductor layer. Thus, the overlying semiconductor layer is allowed to have a region where the density of lattice defects therein is reduced. This region containing reduced (i.e., fewer) defects can be used for forming an active region of the resultant semiconductor device, thereby resulting in improved operational characteristics.
Thus, the invention described herein makes possible the advantages of (1) providing a semiconductor device with a high degree of reliability and performance by reducing lattice defects in an active region of the semiconductor device; (2) providing a method for fabricating such a semiconductor device; and (3) providing a semiconductor substrate and a fabrication method thereof to be used for the above-mentioned semiconductor device and a fabrication method thereof.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.